vertical encoding

vertical encoding

   <processor> An {instruction set} where a field (a bit or group
   of bits) of the instruction word is decoded (either by
   {hard-wired} {logic} or {microcode}) to generate signals to
   control the {functional units}, as opposed to {horizontal
   encoding} where the instruction word bits are used as the
   control signals directly.

   With vertical encoding, which combinations of signals and
   operations are possible is dictated by the decoding logic; the
   instruction field can only select one of these preprogrammed
   combinations.  This has the advantage that many control
   signals can be generated based on only a few instruction word
   bits and only valid combinations of control signals can be
   generated, e.g. only one source driving a {bus} at once.  An
   {instruction set} may use a mixture of horizontal and vertical
   encoding within each instruction.

   (1995-04-23)